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fix(vt-d): invalidate cache when initializing and updating #665
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1. do not use the global status register value for the global command register 2. wait untile enabled after updatating the global command register 3. print more registers for debugging Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
Signed-off-by: Yuuki Takano <ytakanoster@gmail.com>
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| // Check for completion | ||
| core::sync::atomic::fence(core::sync::atomic::Ordering::Acquire); | ||
| if status[0] != 0 { |
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We should check for status[vtd_unit.index]?
| core::sync::atomic::fence(core::sync::atomic::Ordering::Release); | ||
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| let mut node = MCSNode::new(); | ||
| let vtd_units = IOMMU[self.segment_number].vtd_units.lock(&mut node); |
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Maybe better to add comment about the order of lock acquisition(interrupt_remapping->vtd_units).
| } | ||
| } | ||
| } | ||
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Better to add some kind of handling for timeout?
| array![_ => Mutex::new(None); 32]; | ||
| static IOMMU: [IommuInfo; 32] = array![x => | ||
| IommuInfo { | ||
| segment_number: x, |
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It looks like segment_number always being the same with the array index. Maybe we can delete segment_number field but do you want to keep it to make it explicit?
Description
VT-d Interrupt Remapping Implementation and Enhancements.
Invalidate the cache of interrupt remapping when initializing and updating.
Cache Invalidation
IOMMU State Management
IommuInfoandVtdUnitstructures.IOMMUglobal variable to track both VT-d units and interrupt remapping tablesRelated links
https://www.google.com/url?sa=t&source=web&rct=j&opi=89978449&url=https://cdrdv2-public.intel.com/671081/vt-directed-io-spec.pdf&ved=2ahUKEwjJ1oCiufaRAxWPnq8BHVbbLy8QFnoECAwQAQ&usg=AOvVaw3fO9wnba58SqsP2HNKwdfu
How was this PR tested?
Tested on a physical x86_64 machine.
Notes for reviewers